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1. Responsible for complex digital design and application, such as USB3/PCIE PHY or controller, AMBA , or other general IPs design;
2. Co-work with analog team for high speed mixed design (Serdes), such as USB or PCIE PHY;
3. RTL Coding, including block design, top level design, DFT/Lower power design in SoC;
4. Integrate some general IPs(USB/PCIE controller/I2C......) to SoC,clock & reset structure design, chip debugging, failure analysis;
5. support physical layout team on analog macro integration and synthesis/timing analysis;
QUALIFICATION:
1. Solid understanding of digital design is a must;
2. Experience in USB3/PCIE pcs design ;
3. Good knowledge of some general protocols or IPs: USB/PCIE , AMBA, I2C, uart, ARM;
4. Skilled in C,verilog and system Verilog language, vcs/nc verilog sim tool;
5. Relevant experience in USB3/PCIE controller or USB3/PCIE PHY design is a big plus;
6. Self motivated, good communication skill and team work spirit.
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工商信息
- 公司名称晶晨半导体科技(北京)有限公司
- 法定代表人钟培峰(JOHN ZHONG)
- 成立日期2017-12-27
- 企业类型有限责任公司(法人独资)
- 经营状态存续
- 注册资金300万人民币
工作地址
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更新于:2024-05-11